Research
Publications & Presentations
from
the Minnesota Analog Design Group
Google Scholar Page
Note: Some of the papers have been made available in PDF format as a courtesy.
Please be aware that most are copyrighted by the organization responsible for
the corresponding publication.
·
2020
o Learning from Experience: Applying ML to
Analog Circuit Design (paper),
Kishor Kunal, Tonmoy Dhar, Yaguang LI, Meghna Madhusudan, Jitesh Poojary,
Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat
Mukherjee and Sachin S. Sapatnekar, “Proc. of International Symposium on
Physical Design, September 2020
o GANA: Graph Convolutional Network Based
Automated Netlist Annotation for Analog Circuits (paper),
Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind
Sharma, Wenbin Xu, Steven Burns, Jiang Hu, Ramesh Harjani and Sachin S.
Sapatnekar, In Proceedings of the Design Automation and Test in Europe Conference
(DATE), March 2020, Grenoble, France.
o Exploring a Machine Learning Approach to
Performance Driven Analog IC Placement (paper)
Yaguang Li, Yishuang Lin, Meghna Madhusudan, Arvind Sharma, Wenbin Xu, Sachin
Sapatnekar, Ramesh Harjani, Jiang Hu, ISVLISI, Jul 6-8, 2020, Limassol, Cypress
·
2018
o
Analysis
and Design of Radio-Frequency Linear Periodically-Time-Varying Circuits (slides),
E. Klumperink, H. Krishnaswamy, S. Pamarti and R.
Harjani, IEEE International Conference on Electronics Circuits and Systems,
Bordeaux, France, Dec 2018
o A 2.4GHz IEEE 802.15.6 Compliant 1.52nJ/bit
TX & 1.32nJ/bit RX Multiband Transceiver for Low Power Standards (paper)
Mustafijur Rahman and Ramesh Harjani, International Conference on Electronics
Circuits and Systems (ICECS), Bordeaux, 2018
o
A Highly
Digital 1GS/s 7-bit PWM ADC in 65nm CMOS using Time Domain Quantization (paper)
Anindya Saha and Ramesh Harjani, Electronics Letters, 2018
o A 0.4-1.0GHz, 47MHops/S Frequency Hopped TXR
Front-End With 20dB In-Band Blocker Rejection (paper)
Naser Mousavi, Zhiheng Wang and Ramesh Harjani, (Best paper award)
IEEE European Solid-State Circuits, Sept 2018
o A 4GHz Instantaneous Bandwidth Low Squint
Phased Array using Sub-Harmonic ILO Based Channelization (paper)
Qingrui Meng and Ramesh Harjani, IEEE European Solid-State Circuits, Sept 2018
o A Zero Ripple Digital LDO With 0.6V Minimum
Input Voltage, 200X Load Range and 98.7% Current Efficiency (paper)
Saurabh Chaubey and Ramesh Harjani, Techcon, Sept
2018
o A 100MS/s 9-bit Companding
SAR ADC with On-Chip Input Driver in 65nm CMOS for Multi-Carrier Communications
(paper)
Anindya Saha, Saurabh Chaubey and Ramesh Harjani, ”, IEEE International Midwest Symposium on
Circuits and Systems, August 2018
o A 2.4GHz, Sub-1V, 2.8dB NF, 475uW Dual-Path
Noise and Nonlinearity Cancelling LNA for IoT &
WBAN (paper)
Mustafijur Rahman and Ramesh Harjani, IEEE Journal of Solid-State Circuits,
May 2018
o
A 5uW-5mW
Input Power Range, 0-3.5V Output Voltage Range RF Energy Harvester with
Power-Estimator-Enhanced MPPT Controller (paper)
Xingyi Hua and Ramesh Harjani, : IEEE Custom Integrated Circuits Conference
(CICC), San Diego, April 2018
o An Ultra-Fast Hopping Correlator-Based
Transceiver with In-Band Jammer Resistance and Multi-Path Resilience (paper)
Ramesh Harjani, Danijela Cabric, Naser Mousavi and Zhiheng Wang, GOMAC 2018
·
2017
o A Smart-Offset Analog LDO with 0.3V Minimum
Input Voltage and 99.1% Current Efficiency (paper)
Saurabh Chaubey and Ramesh Harjani, IEEE Asian Solid-State Circuits
Conference, November 2017
o An Overview of Time-Based Computing with
Stochastic Constructs (paper)
Hassan M. Najafi, Shiva Jamali-Zavereh, David
Lilja, Marc Riedel, Kiarash Bazargan, Ramesh Harjani,
“An Overview of Time-Based Computing with Stochastic Constructs”, IEEE Micro,
November 2017
o A Smart-Offset Analog LDO with 0.3V Minimum
Input Voltage and 99.1% Current Efficiency (paper)
Saurabh Chaubey and Ramesh Harjani, Techcon,
September 2017
o Jitter Reduction Techniques for High-Speed
Data Converters (slides, ref)
CMOS Emerging Technologies Research Workshop, Warsaw, Poland, May 2017
o
Low-Power
Wideband Analog Channelization Filter Bank using Passive Polyphase-FFT Techniques
(paper)
Hundo Shin and Ramesh, IEEE Journal of Solid-State Circuits, June 2017
o Designing Energy Efficient Radios for
Emerging Low Power Standards (slides)
Ramesh Harjani, Tutorial: IEEE
Radio Frequency Integrated Circuits (RFIC) May 2017
o Channelization
& Signal Classification of Wideband Signals, (slides)
Delft University, Department of Electrical Engineering, Delft, Netherlands,
April 10 2017
o A Sub-1V, 2.8dB NF, 475uW Coupled LNA for
Internet of Things Employing Dual-Path Noise and Nonlinearity Cancellation (paper)
Mustafijur Rahman and Ramesh Harjani, IEEE Radio Frequency Integrated Circuits (RFIC) May 2017
o Integrated DC-DC Converter Design (slides, paper)
Ramesh Harjani, Tutorial: IEEE Custom Integrated Circuits Conference (CICC),
Austin, April 2017
o
Fully
Tunable Software Defined DC-DC Converter with 300X Output Current & 4X
Output Voltage Range (paper)
Saurabh Chaubey and Ramesh Harjani,
IEEE Custom Integrated Circuits Conference (CICC), Austin, April 2017
o
Time-Encoded
Values for Highly Efficient Stochastic Circuits (paper)
M Hassan Najafi, Shiva Jamali-Zavereh, David J.
Lilja, Marc D. Riedel, Kia Bazargan and Ramesh Harjani, IEEE Transactions on
VLSI, 2017
·
2016
o A Jitter-Resilient Sampling Technique for
High-Resolution ADCs in Wideband RF Receivers (paper)
Shiva Jamali-Zavareh and Ramesh Harjani, (invited) for special session on
Advanced Concepts for Future RF and mmW Transceivers,
IEEE International Conference on Electronics Circuits and Systems (ICECS),
Monte Carlo, Monaco, December 2016
o CMOS Energy Efficient Integrated Radios for
Emerging Low Power Standards (paper)
Mustafijur Rahman and Ramesh Harjani, (invited)
to IEEE International SoC Design Conference (ISOCC), Jeju, Korea , Oct 2016
o Designing High-Performance Circuits Using
Inverter Based Amplifiers (slides)
Ramesh Harjani, tutorial at International SoC Design
Conference (ISOCC) Jeju Island, Oct 2016
o A Tunable, 3000X Output Range, DC-DC
Converter Using Low Leakage, 15.7fF/um2 Custom Capacitors ()
Saurabh Chaubey and Ramesh Harjani, Techcon Sept 2016
o A Sub 1V 2.8dB NF 480uW Coupled LNA for
Internet of Things Employing Passive Noise & Nonlinearity Cancellation
()
Mustafijur Rahman and Ramesh Harjani, Techcon Sept
2016
o A 1GHz Signal Bandwidth 4-Channel-I/Q
Polyphase FFT Filter Bank (paper)
Hundo Shin and Ramesh Harjani, European Solid-State Circuits Conference
(ESSCIRC), Lausanne, Sept 2016
o
An Easily
Extendable FFT Based Four-Channel, Four-Beam Receiver with Progressive Partial
Spatial Filtering in 65nm (paper)
Qingrui Meng and Ramesh Harjani, European Solid-State Circuits Conference
(ESSCIRC), Lausanne, Sept 2016
o
Ultra-Low-Power
Radio Designs (slides)
Ramesh Harjani, CMOS
Emerging Technologies Research Workshop, Montreal, Canada, May 2016 (www.cmosetr.com)
o A 4.1W/mm^2 Hybrid Inductive/Capacitive
Converter for 2-140mA DVS Load Under Inductor (paper)
Sudhir Kudva, Saurabh Chaubey and Ramesh Harjani, Journal of Low Power
Electronics and Applications, pp 1-19, April 2016
o
A Sub-1V
194μW 31dB FOM 2.3-2.5 GHz Mixer-First Receiver Frontend for
WBAN with Mutual Noise Cancellation (paper)
Mustafijur Rahman and Ramesh Harjani, IEEE Transactions on Microwave Theory and
Techniques, pp 1102-1109, April 2016
o IEEE Solid-State Circuits
Society Young Professionals
Organized by Emre Ayranci, , IEEE International Solid-State Circuits Symposium,
February, 2016
·
2015
o Wideband Blind Signal Classification on a
Battery Budget (paper)
Ramesh Harjani, Danijela Cabric, Dejan Markovic, Brian S. Sadler, Rakesh K.
Palani, Anindya Saha, Hundo Shin, Eric Rebeiz, Sina Basir-Kazeruni and Fang-Li
Yuan, in IEEE Communications Magazine, October 2015
o 3.5-0.5V Input, 1.0V Output Multi-Mode
Power Transformer for a Supercapacitor Power Source with a Peak Efficiency of
70.4% (paper)
Xingyi Hua and Ramesh Harjani, IEEE Custom Integrated Circuits Conference,
September 2015.
o A 220MS/s 9bit 2X Time-Interleaved SAR ADC
with a 133fF Input Capacitance and a FOM of 37fJ/conv
in 65nm CMOS (paper)
Rakesh K. Palani and Ramesh Harjani, IEEE Transactions on Circuits and Systems
– II, 2015
o An Eight Channel Analog-FFT Based 450MS/s
Hybrid Filter Bank ADC With Improved SNDR for Multi-Band Signals in 40nm CMOS (paper)
Hundo Shin, Rakesh K. Palani, Anindya Saha, Fang-Li Yuan, Dejan Markovic
and Ramesh Harjani, IEEE Custom Integrated Circuits Conference, September 2015
o A 4.6mW, 22dBm IIP3 all MOSCAP Based
34-314MHz Tunable Continuous Time Filter in 65nm (paper)
Rakesh Kumar Palani and Ramesh Harjani, IEEE Custom Integrated Circuits
Conference, September 2015
o Design of PVT Tolerant Inverter Based
Circuits for Low Supply Voltages (paper)
Ramesh Harjani and Rakesh Kumar Palani, (Invited), IEEE Custom Integrated
Circuits Conference, September 2015
o An Ultra-Low Power 2.3-2.5 GHz RF Frontend
for WBAN Employing Frequency Translated Mutual Noise Cancellation (FTMNC)
Mustafijur Rahman and Ramesh Harjani, Techcon,
September 2015
o Chopper Stabilized Sub 1V Reference Voltage
in 65nm CMOS (paper)
Rakesh Kumar Palani, Aravindhan Rangarajan and Ramesh Harjani, Midwest
Symposium on Circuits and Systems, Fort Collins, Aug 2015
o
Fluidic
Switching and Tuning of Fabry-Perot Antenna (paper)
Chanjoon Lee, Robert Sainati, Rhonda Franklin and Ramesh Harjani, IEEE
International Symposium on Antennas and Propagation, July 2015
o Comparative Analysis of Frequency Selective
Surface Geometry effect in Fabry-Perot Cavity Antenna
Design (paper)
Chanjoon Lee, Robert Sainati, Rhonda Franklin and Ramesh Harjani,
IEEE Wireless and Microwave Technology Conference (WAMICON), April 2015
o A Throughput-Agnostic 11.9-13.6GOPS/mW Multi-Signal Classification SoC
for Cognitive Radios in 40nm CMOS (paper)
Fang-Li Yuan, Rakesh Kumar Palani, Sina Basir-Kazeruni, Hundo Shin, Anindya Saha, Ramesh Harjani and Dejan Markovic,
IEEE VLSI Circuits Symposium, June 2015
o Capacitive DC-DC Converter Design (Slides1-Ramesh)
(Slides1-Saurabh)
(Slides1-Rinkle)
Ramesh Harjani, Saurabh Chaubey and Rinkle Jain, IEEE International Symposium
on Circuits and Systems, Lisbon May 2015
o IEEE Circuits and Systems PhD Gold & Young Professionals
Organized by Nuno Horta and
Martin di Federico, Presenters: Franco Maloberti,
Zhihua Wang, Georges G.E. Gielen, Ramesh Harjani, and Jose Franca, IEEE
International Symposium on Circuits and Systems, Lisbon May 2015
o A 3-Band Switched-Inductor LC VCO and
Differential Current Re-Use Doubler Achieving
0.7-11.6GHz Turning Range (paper)
Bodhisatwa Sadhu, Sachin Kalia and Ramesh Harjani, IEEE Radio Frequency
Integrated Circuits (RFIC) May 2015
o A 0.7V 194uW 31dB FOM 2.3-2.5 GHz RF
Frontend for WBAN with Mutual Noise Cancellation using Passive Coupling (paper)
Mustafijur Rahman and Ramesh Harjani, IEEE Radio Frequency Integrated Circuits
(RFIC) May 2015
o An IEEE 802.15.6 Standard Compliant
2.5nJ/bit Multiband WBAN Transmitter using Phase Multiplexing and Injection
Locking (paper)
Mustafijur Rahman, Mohammad Elbadry and Ramesh Harjani, (invited) IEEE Journal of Solid-State Circuits, May 2015
o Energy
Efficient RF Frontends: Using Injection Locking and Other Tricks (slides)
Ramesh Harjani, Keynote at the IEEE
Japan-Egypt Conference on Electronics, Communication and Computers (JEC-ECC),
Kyushu University, Fukuoka, Japan, March 2015
o
Challenges
and Opportunities for Energy Efficient Digital Electronics, (paper)
William T. Cochran, Romeo del Rosario, James Wilson, Paul Amirtharaj and Ramesh
Harjani, Government Microcircuit Applications & Critical Technology
Conference (GOMAC Tech), St. Louis, MO, March 2015
·
2014
o Mixed-Signal Architectures on
Wideband Sampling (slides)
Ramesh Harjani, Keynote at the
IEEE Global Conference on Signal and Information Processing, , Dec 3-5, 2014
Atlanta GA, USA
o A Unified Framework for Capacitive
Series-Parallel DC-DC Converter Design (paper)
Ramesh Harjani and Saurabh Chaubey, (invited)
IEEE Custom Integrated Circuits Conference, September 2014
o A 52% Tuning Range QVCO with a Reduced
Noise Coupling Scheme and a Minimum FOMT of 196dBc/Hz (paper)
Mohammad Elbadry, Sachin Kalia and Ramesh Harjani, IEEE Custom Integrated
Circuits Conference, September 2014
o High Linearity PVT Tolerant 100MS/S Rail-to-Rail ADC Driver with Built-in
Sampler in 65nm CMOS (paper)
Rakesh Kumar Palani and Ramesh Harjani, IEEE Custom Integrated Circuits
Conference, September 2014
o High Power-Density, Hybrid
Inductive/Capacitive Converter with Area Reuse for Multi-Domain DVS (paper)
Sudhir Kudva, Saurabh Chaubey and Ramesh Harjani, IEEE Custom Integrated
Circuits Conference, September 2014
o An Ultra Low
Power Multiband WBAN Transmitter using a Novel ILO Based Modulator
Mustafijur Rahman and
Ramesh Harjani, SRC Techcon Sept 2014
o A Unified Model Based Framework for
Capacitive DC-DC Converter Design
Ramesh Harjani and Saurabh Chaubey, SRC
Techcon Sept 2014
o Passive Switched Capacitor RF Front Ends
for Spectrum Sensing in Cognitive Radios (paper)
Bodhisatwa Sadhu, Martin Sturm, Brian M. Sadler, and Ramesh Harjani, International
Journal of Antennas and Propagation, vol. 2014, Article ID 947373, 20 pages,
2014.
o Building
an on-chip spectrum sensor for cognitive radios (paper)
Bodhisatwa Sadhu, Martin Sturm, Brian M. Sadler, and Ramesh Harjani, April
2014, IEEE Communications Magazine (invited)
o Low-Power Circuits for
Broadband Sampled-Data RF-Frontends (slides)
Ramesh
Harjani, CMOS Emerging Technologies Workshop, CEA-MINATEC, Grenoble, France,
July 7-8 2014 (invited)
o A 2.5nJ/bit Multiband (MBAN & ISM)
Transmitter for IEEE 802.15.6 based on a Hybrid Polyphase-MUX/ILO based
Modulator (paper)
Mustafijur Rahman,
Mohammad Elbadry and Ramesh Harjani, RFIC June 2014
·
2013
o A
1.56mW 500MHz 3rd-Order Filter with Current-Mode Active-RC Biquad and 33dBm
IIP3 in 65nm CMOS (paper)
Rakesh Kumar Palani, Martin Sturm and Ramesh Harjani, IEEE Asian Solid-State
Circuits Conference, Singapore, November 2013
o Low Power RF Circuits for
Broadband Signals (slides)
Ramesh
Harjani, Keynote talk at the 2013 IEEE International Conference on ASIC, Shenzhen,
China, Oct 30, 2013
o Efficient Power Management
Using Fully Integrated DC-DC Converters (slides)
Ramesh
Harjani, Keynote talk
at the 2013 IEEE International Midwest Symposium on Circuits and Systems,
Columbus OH, August 6th, 2013
o A
23.5GHz PLL with an Adaptively Biased VCO in 32nm SOI-CMOS (paper)
J.-O. Plouchart, M. Ferriss, A. Natarajan, A. Valdes-Garcia,
B. Sadhu, A. Rylyakov, B. Parker, M. Beakes, A. Babakhani, S. Yaldiz,
L. Pileggi, R. Harjani, S. Reynolds, J. A. Tierno, D.
Friedman, IEEE Transactions on Circuits and Systems I, August 2013
o A
0.32nJ/bit Noncoherent UWB Impulse Radio Transceiver with
Baseband Synchronization and a Fully Digital Transmitter (paper)
Ashutosh
Mehra, Martin Sturm, Dan Hedin, and Ramesh Harjani, RFIC June 2013
o Fully Integrated Capacitive
DC-DC Converter with All Digital Ripple Mitigation Technique (paper)
Sudhir Kudva and Ramesh Harjani, to appear in (invited) IEEE Journal of
Solid-State Circuits, 2013
o Multi-Beam Spatio-Spectral
Beamforming Receiver for Wideband Phased Arrays (paper)
Sachin Kalia, Satwik Patnaik, Bodhisatwa Sadhu, Martin Sturm, Mohammad Elbadry,
and Ramesh Harjani, IEEE Transactions on Circuits and Systems I, 2013
o A
12Gb/s Multi-Channel I/O using MIMO Crosstalk Cancellation and Signal
Reutilization in 65nm CMOS (paper)
Taehyoun Oh
and Ramesh Harjani, IEEE Journal of Solid-State Circuits, Vol 48, No. 6, June
2013
o Dual
Channel Injection-Locked Quadrature LO Generation for a 4-GHz Instantaneous
Bandwidth Receiver at 21 GHz Center Frequency (paper)
Mohammad
Elbadry, Bodhisatwa Sadhu, Joe Qiu and Ramesh Harjani, in IEEE IEEE Transactions on Microwave Theory and Techniques, Vol
61, No 3, March 2013
o Analysis
and Design of a 5GS/s Analog Charge-Domain FFT for an SDR Front-End in 65nm
CMOS (paper)
Bodhisatwa
Sadhu, Martin Sturm, Brian Sadler and Ramesh Harjani, IEEE Journal of
Solid-State Circuits, Vol 48, No 5, May 2013
o A
Linearized VCO Based 25GHz PLL with Automatic Biasing (paper) (Correction to paper)
Bodhisatwa Sadhu, Mark A. Ferriss, Jean-Olivier
Plouchart, Arun S. Natarajan, Alexander V. Rylyakov,
Alberto Valdes-Garcia, Benjamin D. Parker, Scott Reynolds, Aydin Babakhani, Soner Yaldiz, Larry Pileggi, Ramesh Harjani,
Jose Tierno and Daniel Friedman, IEEE Journal of
Solid-State Circuits, Vol 48, No 5, May 2013
·
2012
o A/D-CLASIC: A Low Power Analog-FFT Based
Cognitive Radio Sensor IC ()
Ramesh Harjani, Danijela Cabric, Dejan Markovic, Babak Daneshrad, Chuck Kryzak
and Brian Sadler, AFRL Cognitive RF Workshop, Sept 2012
o An 8GHz Multi-Beam Spatio-Spectral
Beamforming Receiver Using an All-Passive Discrete Time Analog Baseband in 65nm
CMOS (paper)
Satwik
Patnaik, Sachin Kalia, Bodhisatwa Sadhu, Martin Sturm, Mohammad Elbadry and
Ramesh Harjani, IEEE Custom Integrated Circuits Conference,
September 2012
o Fully Integrated Capacitive Converter With All
Digital Ripple Mitigation (paper)
Sudhir S.
Kudva and Ramesh Harjani, IEEE Custom Integrated Circuits
Conference, September 2012
o A 5-300MHz CMOS Transceiver for Multi-Nuclear
NMR Spectroscopy (paper)
Jaehyup Kim,
Bruce Hammer and Ramesh Harjani, IEEE Custom Integrated
Circuits Conference, September 2012
o A 23.5GHz PLL with an adaptively biased VCO
in 32nm SOI-CMOS (paper)
J.-O. Plouchart, M. Ferriss, A. Natarajan, A.
Valdes-Garcia, B. Sadhu, A. Rylyakov, B. Parker, M. Beakes, A. Babakani, S. Yaldiz, L. Pileggi, R. Harjani, S. Reynolds,
J. A. Tierno, D. Friedman “, IEEE Custom Integrated
Circuits Conference, September 2012
o Adaptive Calibration Algorithm for MIMO
Channel Equalization and Crosstalk Cancellation ()
Taehyoun Oh and Ramesh Harjani, Techcon, September
2012
o Fully Integrated Capacitive Converter With
All Digital Ripple Mitigation ()
Sudhir S.
Kudva and Ramesh Harjani, SRC Techcon,
September 2012
o CRAFT: A 5GS/s 12.2pJ/conv
Analog Domain FFT for a Software Defined Radio Front-End in 65nm CMOS (paper)
Bodhisatwa
Sadhu, Martin Sturm, Brian Sadler and Ramesh Harjani, RFIC June 2012
o Dual Channel Injection-Locked Quadrature LO
Generation for a 4GHz Instantaneous Bandwidth Receiver at 21GHz Center
Frequency (paper)
Mohammad
Elbadry, Bodhisatwa Sadhu, Joe Qiu and Ramesh Harjani, RFIC June 2012 (nominated for Best Paper Award)
o A 21.8-27.5GHz PLL in 32nm SOI Using Gm
Linearization to Achieve -130dBc/Hz Phase Noise at 10MHz Offset from a 22GHz
Carrier (paper)
Bodhisatwa Sadhu, Mark A. Ferriss, Jean-Olivier
Plouchart, Arun S. Natarajan, Alexander V. Rylyakov,
Alberto Valdes-Garcia, Benjamin D. Parker, Scott Reynolds, Aydin Babakhani, Soner Yaldiz, Larry Pileggi, Ramesh Harjani,
Jose Tierno and Daniel Friedman, RFIC June 2012 (nominated for Best Paper Award)
o Tutorial: Injection Locking for Wideband,
Fast Settling, RF Synthesizers, (slides)
IMS/RFIC, June 2012 (invited)
o 4x12 Gb/s 0.96 pJ/b/lane
Analog-IIR Crosstalk Cancellation and Reutilization Receiver for Single-Ended
I/Os in 65 nm CMOS (paper)
Taehyoun Oh and Ramesh Harjani, IEEE VLSI Circuits Symposium, June 2012
·
2011
o Frequency-Hopped
Quadrature Frequency Synthesizer in 0.13-μm Technology (paper)
Narasimha Lanka, Satwik Patnaik and Ramesh Harjani, IEEE Journal of Solid State
Circuits, September 2011
o A
10 Gb/s MIMO Channel Equalization and Crosstalk Cancellation Architecture for
High-Speed I/Os
Taehyoun Oh and Ramesh Harjani, TECHCON, September 2011
o A
Zero-Area, Zero-Power Supply Resonance Reduction Technique
Sudhir Kudva and Ramesh Harjani, TECHCON, September 2011
o Fully
Integrated On-Chip DC-DC Converter with a 450x Output Range (paper)
Sudhir Kudva
and Ramesh Harjani, (invited), IEEE Journal of Solid-State Circuits,
August 2011
o A
6 Gb/s MIMO Crosstalk Cancellation Scheme for High-Speed I/Os
(paper)
Taehyoun Oh
and Ramesh Harjani, (invited) IEEE Journal of Solid-State Circuits,
August 2011
o Back to the Future: Going Analog (slides)
Ramesh Harjani, CMOS Emerging Technologies Workshop, August 2011 (invited)
o A
Simple, Unified Phase Noise Model for Injection-Locked Oscillators (paper)
Sachin
Kalia, Mohammad Elbadry, Bodhisatwa Sadhu, Satwik Patnaik and Ramesh Harjani, ,
IEEE Radio Frequency Integrated Circuits (RFIC), June 2011
o Tutorial: Systems &
Circuits for Sensing, Co-Existence, and Interference Mitigation in SDR and
Cognitive Radios ()
Organizers: Ramesh Harjani, Brian Sadler, Hossein Hashemi and Jacques C.
Rudell, IEEE RFIC, June 2011.
Ramesh Harjani (University of Minnesota)(), Preston Marshal (University
of Southern California), Brian Sadler (Army Research Laboratory),
Mark McHenry (Shared Spectrum), Danijela Cabric (University of
California, Los Angeles), Sebastian Hoyos (Texas A&M University),
Chris Rudell (University of Washington), Hossein Hashemi (University
of Southern California), Larry Larson (University of California, San
Diego), Bram Nauta (University of Twente), Jan Craninckx (IMEC, Leuven), Ranjit
Gharpurey (University of Texas, Austin)
o Tutorial: Software defined
radios: The CMOS Way & Cognitive Radio and Analog Circuit Design Challenges
()
Organizers: Ramesh Harjani, Bram Nauta, Eric A.M. Klumperink, and R. Bogdan Staszewski, IEEE International
Symposium on Circuits and Systems, May 15, 2011.
Ramesh Harjani (University of Minnesota)(), Bram Nauta (University of Twente)(),
Eric A.M. Klumperink (University of Twente)(), R. Bogdan Staszewski (Delft University of
Technology Faculty of Information Technology and Systems)()
·
2010
o Capacitor
Bank Design for Wide Turning Range LC VCO: 850MHz - 7.1GHz (157%) (paper)
Bodhisatwa
Sadhu and Ramesh Harjani, IEEE International Symposium on Circuits and Systems,
2010
o A
24-GHz Phased-Array Receiver in 0.13um CMOS using a 8-GHz LO (paper)
Satwik
Patnaik and Ramesh Harjani, IEEE RFIC 2010
o A
Low Power CMOS Receiver for a Tissue Monitoring NMR Spectrometer (paper)
Jaehyup Kim,
Bruce Hammer and Ramesh Harjani, IEEE VLSI Circuits
Symposium, June 2010
o Inductors
Above Digital Circuits: Towards Compact On-Chip Switching Regulators (paper)
Sudhir Kudva
and Ramesh Harjani, TECHCON, September 2010
o A
5 Gbps 0.13um CMOS Pilot-Based Clock and Data
Recovery Scheme for High-Speed Links (paper)
Mahmoud Reza
Ahmadi, Amir Amirkhany and Ramesh Harjani, IEEE
Journal of Solid State Circuits, August 2010
o Fully
Integrated On-Chip DC-DC Converter with a 450x Output Range (paper)
Sudhir Kudva
and Ramesh Harjani, IEEE Custom Integrated Circuits Conference, Sept 2010
o A
5Gb/s 2×2 MIMO Crosstalk Cancellation Scheme for High-Speed I/Os (paper)
Taehyoun Oh
and Ramesh Harjani, IEEE Custom Integrated Circuits Conference, Sept 2010
o Fun with Injection Locking
(slides)
Ramesh Harjani, Keynote Talk at IEEE Asia Pacific Conference on Circuits and
Systems, December 2010, Kuala Lumpur, Malaysia (link)
·
2009
o 1-10GHz
Inductorless Receiver in 0.13um CMOS (paper)
Liuchun Cai
and Ramesh Harjani, IEEE RFIC 2009 (nominated for best paper award)
o Software Defined Radios: The
Semi-Analog Way
(slides)
Ramesh Harjani at the Northern Virginia and Washington DC chapters of the IEEE
MTT society, March 31, 2009
o A
Dual-Mode Architecture for a Phased-Array Receiver Based on Injection Locking
in 0.13um CMOS (paper)(slides)
Satwik
Patnaik, Narasimha Lanka and Ramesh Harjani, IEEE International Solid-State
Circuits Conference (ISSCC), February 2009
o Evaluating
Noise Coupling Issues in Mixed-Signal 3D ICs (paper)(poster)
Liuchun Cai
and Ramesh Harjani, DATE 2009 Friday Workshop on 3D Integration
o A
CMOS 3.3-8.4 GHz Wide Tuning Range, Low Phase Noise LC VCO (paper)
Bodhisatwa
Sadhu, Jaehyup Kim and Ramesh Harjani, IEEE Custom Integrated Circuits
Conference, Sept 2009
o A
5Gpbs 0.13um CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed
Links (paper)
Mahmoud Reza
Ahmadi, Amir Amirkhany and Ramesh Harjani, IEEE
Custom Integrated Circuits Conference, Sept 2009
o A
Sub-2.5ns Frequency-Hopped Quadrature Frequency Synthesizer in 0.13-$um
Technology (paper)
Narasimha
Lanka, Satwik Patnaik and Ramesh Harjani, IEEE Custom Integrated Circuits
Conference, Sept 2009
o Multi-Rate Sigma-Delta
Converter, (poster)
Shubha Bommalingaiahnapallya and Ramesh Harjani, European Solid-State Circuits
(ESSCIRC) Fringe Poster Session, September 2009
o Implantable CMOS Tissue
Monitoring NMR Spectrometer (paper)
Ramesh Harjani, Jaehyup Kim, Satwik Patnaik and Bruce Hammer (invited), IEEE
Circuits and Systems for Medical Environmental Applications Workshop, Merida,
Mexico, December 2009
o Programmable,
Software Definable and Cognitive Radios (paper)
Ramesh
Harjani (Invited), Silicon India, December 2009
·
2008
o Constrained
Partial Response Receivers for High-Speed Links (paper)
Mahmoud Reza
Ahmadi, Jaekyun Moon and Ramesh Harjani, “IEEE Transactions on Circuits and
System II, October 2008, Vol 55. Issue 10, pp 1006-1010
o Design
and Implementation of Active Decoupling Capacitor Circuits for Power Supply
Regulation in Digital ICs (paper)
Jie Gu, Ramesh Harjani and Chris
H. Kim, IEEE Transactions on VLSI, 2008
o Modeling
and Synthesis of Wide-Band Switched-Resonators for VCOs (paper)
Bodhisatwa
Sadhu, Umaikhe E. Omole, and Ramesh Harjani, IEEE Custom Integrated Circuits
Conference, Sept 2008
o Modeling,
Measurement and Mitigation of Crosstalk Noise Coupling in 3D-ICs (paper)
Liuchun Cai
and Ramesh Harjani, IEEE Custom Integrated Circuits Conference, Sept 2008
o I/O Staggering for Low-Power
Jitter Reduction (paper)
Kin-Joe Sham
and Ramesh Harjani, European Microwave Conference, Aug 2008
o Sub-10ns Frequency Hopping
Synthesizer based on Injection-Locking (paper)
Narasimha
Lanka, Satwik Patnaik and Ramesh Harjani, European Microwave Conference, Aug
200
o A High Efficiency DC-DC Converter Using 2nH Integrated Inductors (paper)
Josh Wibben and Ramesh
Harjani, IEEE Journal of Solid-State Circuits, April 2008
o A 3X5Gb/s Multi-Lane Low-Power 0.18um CMOS Pseudo-Random Bit
Sequence Generator (paper)
Kin-Joe Sham, Shubha
Bommalingaiahnapallya, Mahmoud Reza Ahmadi and Ramesh Harjani, IEEE
Transactions on Circuits and Systems II: Express Briefs, May 2008
o Exploiting the Transient Behavior of Injection Locked Oscillators (slides)
Ramesh Harjani, CMOS
Emerging Technologies Workshop, August 2008 (invited)
·
2007
o Design of Programmable
Wireless Networks - Tutorial (abstract)
Ramesh Harjani, Ahmed Tewfik, Keshab Parhi, and Gerald Sobelman, IEEE Portable,
March 2007
o High-Speed Circuits for a
Multi-Lane 12 Gbps CMOS PRBS Generator (paper)
Shubha Bommalingaiahnapallya, Kin-Joe Sham, Mahmoud Reza Ahmadi, and Ramesh
Harjani, IEEE International Symposium on Circuits and
Systems, May 2007
o Design of Programmable
Wireless Networks aka Cognitive Radio - Tutorial (abstract)
Ramesh Harjani, Ahmed Tewfik, Keshab Parhi, and Gerald Sobelman, IEEE Symposium
on Circuits and Systems, May 2007
o A High Efficiency DC-DC
Converter Using 2nH On-Chip Inductors (paper)
Josh Wibben and Ramesh Harjani, Symposium on VLSI Circuits, June 2007
o Understanding the Transient
Behavior of Injection Locked LC Oscillators (paper)
Narasimha Lanka, Satwik Patnaik and Ramesh Harjani, IEEE Custom Integrated
Circuits Conference, September 2007
o Fast Hopping Injection Locked
Frequency Generation for UWB (paper)
Narasimha Lanka and Ramesh Harjani (invited), IEEE International
Conference on Ultra-Wideband (ICUWB), September 2007
o Software Defined Cognitive
Radios - Tutorial
Ramesh
Harjani, Ahmed Tewfik and Gerald Sobelman, IEEE International Conference on
ASIC (ASICON), October 2007
o Inductorless Design of CMOS RF Frontends (paper)
Ramesh Harjani and Liuchun Cai, EEE International Conference on ASIC (ASICON),
October 2007 (invited)
o High Speed Frequency Hopping
Using Injection Locked RF Front-ends (paper)
Narasimha Lanka and Ramesh Harjani (invited), IEEE Asilomar Conference
on Signals, Systems, and Computers, November 2007
·
2006
o A 20Gb/s Transceiver for
Network-On-Chip (abstract)(poster)
Zain Asgar, Jia Zou, Priyesh Jain, Raghavendra Kamath and Ramesh Harjani, "Future
Interconnects and Networks on Chip Workshop" Munich, Germany, March, 2006
o Distributed Active Decoupling
Capacitors for On-Chip Supply Noise Cancellation in Digital VLSI Circuits (paper)
Jie Gu, Ramesh Harjani and Chris Kim, Symposium on
VLSI Circuits, June 2006
o FEXT Crosstalk Cancellation
for High-Speed Serial Link Design (paper)
Kin-Joe Sham, Mahmoud Reza Ahmadi, Shubha Bommalingaiahnapallya, Gerry Talbot
and Ramesh Harjani, IEEE Custom Integrated Circuits Conference, September 2006
o Gain Calibration Technique
for Increased Resolution in FRC Data Converters (paper)
Frank Dropps and Ramesh Harjani, IEEE Transactions on Circuits and Systems II:
Express Briefs, Vol 53, No. 11, November 2006
·
2005
o A New Noncoherent
UWB Impulse Radio Receiver, (paper)
Mi-Kyung Oh, Byunghoo Jung, Ramesh Harjani, and
Dong-Jo Park, IEEE Communications Letters, Feb, 2005
o Tutorial: High-Speed
Interconnect Technology: On-Chip and Off-Chip ()
Ramesh Harjani, Jaijeet Roychowdhury and Sachin S. Sapatnekar, VLSI Design, Jan
2005.
Ramesh Harjani (University of Minnesota)
Jaijeet Roychowdhury (University of Minnesota)()
Sachin S. Sapatneker (University of
Minnesota)()
o A CMOS High Efficiency +22dBm
Linear Power Amplifier,
(paper)
Yongwang Ding and Ramesh Harjani, to appear in IEEE Journal of Solid State
Circuits, 2005
o Power Optimized LC VCO and
Mixer Co-Design,
(paper)
Byunghoo Jung, Shubha Bommalingaiahnapallya and Ramesh Harjani, IEEE
International Symposium on Circuits and Systems, May 2005
o Pulse Generator Design for
UWB IR Communication Systems (paper)
Byunghoo Jung, Yi-Hung Tseng, Jackson Harvey and Ramesh Harjani, IEEE
International Symposium on Circuits and Systems, May 2005
o Process Tolerant Design of
N-Tone Sigma Delta Converters (paper)
Ramesh Harjani and Shubha Bommalingaiahnapallya, IEEE International Symposium
on Circuits and Systems, May 2005 (invited paper)
o Extended Noise-Shaping in
Cascaded N-Tone Sigma-Delta Converter (paper)
Shubha Bommalingaiahnapallya, Raghavendra
Bommalingaiahnapallya and Ramesh Harjani, International Conference on Advanced
A/D & D/A Conversion Techniques and thier
Applications, Limerick July 2005
o High Performance FRC ADCs
with Gain Calibration (paper)
Frank Dropps and Ramesh Harjani, International Conference on Advanced A/D &
D/A Conversion Techniques and thier Applications,
Limerick July 2005
o Designing LC VCOs Using
Capacitive Degeneration Techniques (paper)
Byunghoo Jung and Ramesh Harjani, to appear in International Journal of
High Speed Electronics and Systems, special issue on High-Speed Mixed-Signal
Integrated Circuits, October 2005
·
2004
o Analog/RF Physical Layer
Issues for UWB Systems (paper)
Ramesh Harjani, Jackson Harvey and Robert Sainati, IEEE VLSI Design 2004,
January 2004 (invited paper)
o Ultra-wideband Systems: An
Introduction & Analog Tradeoffs (slides)
Ramesh Harjani, Indian Institute of Technology, New Delhi, January 2004
o A 20GHz VCO with 5GHz Tuning
Range in 0.25um SiGe BiCMOS
(paper)
Byunghoo Jung and Ramesh Harjani, IEEE International Solid-State Circuits
Conference (ISSCC ), 2004
o A 96dB SFDR 50Ms/s CMOS
Pipeline A/D Converter (paper)
Kavita Nair and Ramesh Harjani, IEEE International Solid-State Circuits
Conference (ISSCC ), 2004
o A Wide Tuning Range VCO Using
Capacitive Source Degeneration, (paper)
Byunghoo Jung and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems (ISCAS), May 2004
o Lowpower Implementation of an N-Tone
Sigma-Delta Converter, (paper)
Shubha B and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems (ISCAS), May 2004
o Tutorial: Ultrawideband
Radio Communications
Arranged by:
J.R. Long and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems (ISCAS), May 2004
V. Srinivasa Somayazulu
(Intel R&D)(slides)
/ John R. Long (Delft University of
Technology)(slides)
/
G. B. Giannakis (University of Minnesota)(slides)
/ Ramesh Harjani (University of Minnesota)(slides)
/
A. H. Tewfik (University of Minnesota)(slides)
/ Lawrence E. Larson (University of California -San Diego)(slides)
Anuj Batra (Texas Instruments)(slides)
o Novel CMOS Low-Loss
Transmission Line Structures, (paper)
Jaewon Kim and Ramesh Harjani, IEEE Radio &
Wireless Conference (RAWCON), September 2004
o A CMOS High Efficiency +22dBm
Linear Power Amplifier, (paper)
Yongwang Ding and Ramesh Harjani, IEEE Custom Integrated Circuits Conference
(CICC), October 2004
o Enhanced Analytic Van der Zeil Noise Model for RF CMOS Design, (paper)
James Keoppe and Ramesh Harjani, IEEE Custom
Integrated Circuits Conference (CICC), October 2004
o A Digital DFT Technique for
Verifying the Static Performance of A/D Converters, (paper)
Wooyoung Choi, Bapiraju Vinnakota and Ramesh Harjani,
IEEE Custom Integrated Circuits Conference (CICC), October 2004
o On the Selection of On-Chip
Inductors for the Optimal VCO Design, (paper)
Yong Zhan ,
o High-Frequency LC VCO Design
Using Capacitive Degeneration, (paper)
Byunghoo Jung and Ramesh Harjani, IEEE Journal of Solid-State Circuits, Vol 39,
No. 17, December 2004
·
2003
o DC-Coupled 900 MHz ISM Band
RF Front-End Design for a Wireless Telemetry Receiver (paper)
Jonghae Kim, Jackson Harvey and Ramesh Harjani, IEEE Journal of Solid-State
Circuits, January 2003
o A Novel Noise Optimization
Design Technique for Radio Frequency Low Noise Amplifiers
o Novel Integrateable
Notch Filter Implementation for 100dB Image Rejection (paper)
Jayant Parathasarathy and Ramesh Harjani, IEEE
International Symposium on Circuits and Systems, May 2003
·
2002
o Design of Low-Phase-Noise
CMOS Ring Oscillators
(paper)
Liang Dai and
o Radio Basics: What Developers
and Integrators Need to Know (slides)
Ramesh
Harjani, Comdex Fall 2002
·
2001
o A +18dBm IIP3 LNA in 0.35
µCMOS (paper)
Yongwang Ding and Ramesh Harjani, IEEE International Solid-State Circuits
Conference (ISSCC ), 2001
o An ISM Band CMOS Integrated
Transceiver Design for Wireless Telemetry System (paper)
Jonghae Kim and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems, 2001
o Analysis and Design of an
Integrated Quadrature Mixer with Improved Noise, Gain, and Image Rejection (paper)
Jackson Harvey and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems, 2001
o Power Optimization of CMOS LC
VCOs (paper)
Ming-ta Hsieh, Jackson Harvey and Ramesh Harjani, IEEE International Symposium
on Circuits and Systems, 2001
o Capacitive Voltage
Multipliers: A High Efficiency Method to Generate Multiple On-Chip Supply
Voltages
(paper)
Ron Balczewski and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems, 2001
o Non-ideal Amplifier Effects
on the Accuracy of Analog-to-Digital Capacitor Ratio Converter (paper)
Wooyoung Choi, Ramesh Harjani and Bapiraju Vinnakota,
IEEE International Symposium on Circuits and Systems, 2001
o An ISM Band CMOS Integrated
Wireless Telemetry Transceiver (paper)
Jonghae Kim and Ramesh Harjani, 53rd IEEE Vehicular Technology Conference, May
2001
o A High Efficiency 20 dBm, 900 MHz Power Amplifier Module in 0.35 um CMOS (paper)
Jonghae Kim and Ramesh Harjani, RAWCON 2001
o A 455Mb/s MR Preamplifier
Design in a 0.8u CMOS Process (paper)
Ramesh Harjani, IEEE Journal of Solid-State Circuits, June 2001
o An integrated quadrature
mixer with improved image rejection at low voltage (paper)
Jackson Harvey and Ramesh Harjani, VLSI Design 2001. Fourteenth International
Conference on VLSI Design, 2001, p 269-73
o A low-phase-noise CMOS ring
oscillator with differential control and quadrature outputs (paper)
Liang Dai and Ramesh Harjani, Proceedings 14th Annual IEEE International
ASIC/SOC Conference, 2001, p 134-8
o Design at the Leading Edge of
Mixed-Signal ICs (slides)
Rob A. Rutenbar & Ramesh Harjani, HotChips 13
Afternoon Tutorial, August 2001
·
2000
o CMOS Switched-Opamp based Sample-and-Hold Circuit (paper)
Liang Dai and Ramesh Harjani, IEEE Journal of Solid-State Circuits, Jan 2000
o Comparison and Analysis of
Phase Noise in Ring Oscillators (paper)
Liang Dai and Ramesh Harjani, IEEE International Symposium on Circuits and
Systems, 2000
o A Universal Analytic Charge
Injection Model
(paper)
Youngwang Ding and Ramesh Harjani, IEEE International
Symposium on Circuits and Systems, 2000
o A High Speed Differential to
Single-Ended Amplifier for Instrumentation Applications (paper)
Doug Dean and Ramesh Harjani, International Symposium on Circuits and Systems,
2000
o An IF Stage Design For An
ASK-based Wireless Telemetry System (paper)
Oyvind Birkenes, Jonghae Kim and Ramesh Harjani, International Symposium on
Circuits and Systems, 2000
o Analysis and Design of
Low-Phase-Noise Ring Oscillators (paper)
Liang Dai and Ramesh Harjani, International Symposium on Low Power Electronics
and Design, 2000
o DFT for Digital Detection of
Analog Parametric Faults in SC Filters (paper)
Bapiraju Vinnakota and Ramesh Harjani, IEEE Trans on
Computer-Aided Design of Circuit and Systems, Vol 19, No 7, July 2000
o A European ISM Band Power
Amplifier Module
(paper)
Ming-ta Hsieh, Jonghae Kim and Ramesh Harjani, IEEE Radio and Wireless
Conference, 2000
o RF Front-End Design with
Copper Passive Components
(paper)
Jonghae Kim, Jim Koeppe, Ming-ta Hsieh, and Ramesh Harjani, Techcon
2000
o A Universal Charge Injection
Model and its Applications
(paper)
Yongwang Ding and Ramesh Harjani, Techcon 2000
o A 900 MHz Front-End Design
with Copper Passive Components (paper)
Jonghae Kim, Jim Koeppe, Ming-ta Hsieh, and Ramesh Harjani, Midwest Symposium
on Circuits and Systems
o Optimal Test-Set Generation
for Parametric Fault Detection in Switched Capacitor Filters (paper)
Wooyoung Choi, Ramesh Harjani and Bapiraju Vinnakota,
Ninth Asian Test Symposium (ATS 2000), December 2000
·
1999
o A High Speed Low Noise CMOS
MR Preamplifier for Disk Drives (paper)
Jeremy Kuehlwein and Ramesh Harjani, European Solid-State Circuits Conference
o An Integrated Low-Voltage
Class AB CMOS OTA
(paper)
Ramesh Harjani, Randy Heineke and Feng Wang, IEEE Journal of Solid-State
Circuits, February 1999
o Power Analysis and Optimal
Design of Opamps for Oversampled Converters, (paper)
Feng Wang and Ramesh Harjani, IEEE Transactions on Circuits and Systems, 1999
o A Telemetry and Interface
Circuit for Piezoelectric Sensors (paper)
Kavita Nair and Ramesh, Proceedings of the IEEE International Symposium on
Circuits and Systems, 1999
o Compact, Ultra Low Power,
Programmable Continuous-Time Filter Banks for Feedback Cancellation in Hearing
Aids (paper)
Kavita Nair and Ramesh Harjani, VLSI Design
o Digital Detection of Parameteric Faults in Data Converters (paper)
Bapiraju Vinnakota and Ramesh Harjani, Proceedings of
the IEEE Custom Integrated Circuits Conference
o Digital Detection of Analog
Parametric Faults in Switched-Capacitor Filter (paper)
Ramesh Harjani and Bapiraju Vinnakota, in Proceedings
of the IEEE/ACM Design Automation Conference
o An ISM Band RF Front-End for
Short Range Wireless Telemetry (paper)
Oyvind Birkenes, Jonghae Kim and Ramesh Harjani , IEEE International ASIC/SOC
Conference, September
o A 273 MHz Low Noise CMOS MR
Preamplifier for Disk Drives (paper)
Jeremy Kuehlwein and Ramesh Harjani,, IEEE International ASIC/SOC Conference,
September
o Embedded cure monitor, strain
gauge, and mechanical state estimator (paper)
J Dubow, W Zhang, Y Lu, J. Bingham, F Syammach, D.G. Krantz, J.H. Belk,
P Biermann, R Harjani, S.C. Mantell, D.L. Polla, P.R. Troyk,
Proceedings of the SPIE - The International Society for Optical Engineering, v
3673, 1999, p 336-50
·
1998
o FRC: A Method for Extending
the Resolution of Nyquist Rate Converters using Oversampling (paper)
Ramesh Harjani and Tom Lee, IEEE Transactions on Circuits and Systems II, pp
482-494, April 1998
o BiCMOS implementation of a 276 MS/s
forward equalizer and 200 MS/s FDTS detector (paper)
Harjani, R. Barnett, R. Butenhoff, IEEE Transactions on Magnetics. v 34 n 1 pt 1 Jan 1998. p 160-165
o Data Acquisition and
Conversion
Ramesh Harjani, Dennis Polla, Kavita Nair and Chris
Zillmer, Wiley Encyclopedia of Electrical and Electronics Engineering, Wiley Interscience, 1998
o "Introduction " and "Design for
Test" in Analog and Mixed-Signal Test: An Overview,
Ramesh Harjani and Bapiraju Vinnakota, Editor Bapiraju Vinnakota, Prentice Hall, 1998
o Gallium Arsenide Based Microsensor Systems (paper)
T. T. Vu, P.C. Nguyen, L.T. Vu, C.H. Nguyen, M.D. Bui, A.C. Nguyen, J.N.C Vu,
Ramesh Harjani, L.L. Kinney, K.K. Parhi, D.L. Polla,
R. Schaumann, P.J. Schiller and M.S. Shur, Government Microcircuit Applications Conference,
16-19 March 1998 (Best paper award)
o Gallium arsenide based
micro-accelerometers (paper)
T.T. Vu, P.C. Nguyen, L.T. Vu, C.H. Nguyen J.N.C Vu, D.L. Polla, P.J. Schiller, S. Stevanovich,
H.Y. Li, Y.Q Yang and R. Harjani,
Proceedings of Midwest Symposium on Circuits and Systems, 1998, pt. 2, p
1111-15 vol.2
o CMOS Switched-Opamp Based Sample-and-Hold Circuit (paper)
Liang Dai and Ramesh Harjani, Proceedings of the IEEE International Symposium
on Circuits and Systems, 1998
·
1997
o Analog Circuit Observer
Blocks (paper)
Bapiraju Vinnakota and Ramesh Harjani, IEEE
Transactions on Circuits and Systems II, Feb 1997, p 154-163
o ACOBs: A DFT technique for
analog circuits
(paper)
Ramesh Harjani and Bapiraju Vinnakota, Circuits and
Systems in the Information Age Proceedings - IEEE International Symposium on
Circuits and Systems 1997. p 231-250
o Pseudoduplication - An ACOB Technique for
Single-Ended Circuits
(paper)
Bapiraju Vinnakota, Ramesh Harjani and Woo-Young
Choi, Proceedings of the IEEE International Conference on VLSI Design, Jan
1997, p 398-402
o Nonlinear Settling Behaviour in Oversampled Converters (paper)
Feng Wang and Ramesh Harjani, Proceedings of the IEEE Custom Integrated
Circuits Conference, 1997, p 495-498
o A Ultra Low Power
Transconductance Cell
(paper)
Kavita Nair and Ramesh Harjani, Proceedings of the IEEE International
Conference on Circuits and Systems, 1997, p 217-220
o Delta-Sigma-Delta Modulator:
An Autoranging A/D Converter (paper)
Mike Gaboury and Ramesh Harjani, Proceedings of the IEEE International
Conference on Circuits and Systems, 1997, p 401-404
o A BiCMOS
Implementation of a 350Ms/s Forward Equalizer and 200Ms/s FDTS Detector (paper)
Ray Barnett, Mike Butenhoff and Ramesh Harjani, Eight Magnetic Recording
Conference, 1997
o Gallium Arsenide Based
Micro-Accelerometers
(paper)
T. T. Vu, P. C. Nguyen, L. T. Vu, C. H. Nguyen, J. N. C. Vu, D. L. Polla, P. J. Schiller, S Stevonovich,
H.Y. Li, Y. Q. Yang and R. Harjani,
40th Midwest Symposium on Circuits and Systems, August 1997
o Microsensors Fabricated in Gallium
Arsenide
(paper)
T. T. Vu, P.C. Nguyen, L.T. Vu, C.H. Nguyen, M.D. Bui, A.C. Nguyen, J.N.C Vu,
Ramesh Harjani, L.L. Kinney, K.K. Parhi, D.L. Polla,
R. Schaumann, P.J. Schiller and M.S. Shur,
Technology 2007 (Federal Lab. Consortium, NASA and NASA Tech Briefs), 22-24
September 1997, Boston Massachusetts
·
1996
o "Feasibility and
Performance Region Modeling of Analog and Digital Circuits", (paper)
Ramesh Harjani and Jianfeng Shao, Analog Integrated
Circuits and Signal Processing- special issue on Macromodeling,
Vol 10, No 1-2, pp 23-43, June/July 1996
o "System-Level Design
for Test of Fully Differential Analog Circuits", (paper)
Ramesh Harjani, Bapiraju Vinnakota and Nicholas J.
Stessman, IEEE Journal of Solid-State Circuits, pp 1526-1534, October 1996
o "Analog
Implementation of the FDTS/DF Detection Algorithm for Magnetic Recording",
(paper)
Ronald V. Jaworski and Ramesh Harjani, IEEE Transactions on Magnetics,
September 1996
o "Feasibility and
Performance Region Modeling of Analog and Digital Circuits",
Ramesh Harjani and Jianfeng Shao, In Modelling and
Simulation of Mixed Analog-Digital Systems, Kluwer Academic Press, 1996
o "The Optimal Design
of Opamps for Oversampled Converters", (paper)
Feng Wang and Ramesh Harjani, Proceedings of the IEEE Custom Integrated
Circuits Conference, pp 337-340, 1996
o "A Non-Slewing Opamp for Oversampled Converters", (paper)
Ramesh Harjani, Proceedings of the IEEE International Conference on
Circuits and Systems, pp 481-484, 1996
o "A Low Voltage Class
AB CMOS Amplifiers", (paper)
Feng Wang, Randy Heineke and Ramesh Harjani, Proceedings of the IEEE
International Conference on Circuits and Systems, pp 392-396, 1996
o "A 200MHz Differential
Sampled Data FIR for Disk Drive Equalization", (paper)
Raymond Barnett and Ramesh Harjani, Proceedings of the IEEE International
Conference on Circuits and Systems, pp 429-432, 1996
o "Analog
Implementation of the FDTS/DF Detection Algorithm for Magnetic Recording",
(paper)
Ronald V. Jaworski and Ramesh Harjani, International Magnetics Conference, 1996
·
1995
o "Self-Initializing
Memory Elements", (paper)
Bapiraju Vinnakota and Ramesh Harjani, IEEE
Transactions on Circuits and Systems II, Vol. 42, No 7, pp. 461-472, July 1995
o "A Low-Power CMOS VGA
for 50Mb/s Disk Drive Read Channels", (paper)
Ramesh Harjani, IEEE Transactions on Circuits and Systems II, Vol. 42, No. 6,
pp. 370-376, June 1995
o "Partial Positive
Feedback for Gain Enhancement of Low Power CMOS OTAs", (paper)
Rongtai Wang and Ramesh Harjani, Analog Integrated Circuits and Signal
Processing, Vol. 8, No 1, pp. 21-35, July 1995
o "An Improved Model
for the Slewing Behavior of Opamps", (paper)
Feng Wang and Ramesh Harjani, IEEE Transactions on Circuits and Systems II,
Vol. 42, No. 10, pp 679-681, October 1995
o "Mixed-Signal Design
Test",
Ramesh Harjani and Bapiraju Vinnakota, in
Microsystems Technology for Multimedia Applications, IEEE Press, May 1995
o "Analog to Digital
Converters",
Ramesh Harjani, in The Circuits and Filters Handbook, Editor: Wai-Kai Chen, IEEE/CRC Press, 1995 (Invited book chapter)
o "Partial Positive
Feedback for Gain Enhancement of Low-Power CMOS OTAs", (paper)
R. Wang and R. Harjani, in Low-Voltage Low-Power Analog Integrated Circuits,
Kluwer Academic Press, 1995
o "Dynamic Amplifier:
Settling, Slewing and Power Issues", (paper)
Feng Wang and Ramesh Harjani, in Proceedings of the IEEE International
Conference on Circuits and Systems, pp. 319-322, 1995
o "System-level Design
for Test of Fully Differential Analog Circuits", (paper)
Bapiraju Vinnakota, Ramesh Harjani and Nicholas J.
Stessman, in Proceedings of the IEEE/ACM Design Automation Conference, pp.
450-454, 1995
·
1994
o "Feasibility Region
Modeling of Analog Circuits for Hierarchical Circuit Design", (paper)
Jianfeng Shao and Ramesh Harjani, in the Proceedings
of Midwest Symposium on Circuits and Systems, pp. 407-410, 1994
o "Macromodeling
of Analog Circuits for Hierarchical Circuit Design", (paper)
Jianfeng Shao and Ramesh Harjani, in Proceedings of
the IEEE/ACM International Conference on Computer-Aided Design, pp. 656-663,
1994
o "Design of Analog
Self-Checking Circuits", (paper)
Ramesh Harjani and Bapiraju Vinnakota, in Proceedings
of the IEEE International Conference on VLSI Design, pp. 67-70, Jan 1994
o "A 6-Bit 40MHz
Current Subtracting Flash Converter", (paper)
Andrew Cable and Ramesh Harjani, in Proceedings of the IEEE International
Symposium on Circuits and Systems, pp. 465-468, 1994
o "Analog Circuit
Observer Blocks", (paper)
Ramesh Harjani and Bapiraju Vinnakota, in Proceedings
of the IEEE VLSI Test Symposium, pp. 258-263, April, 1994
·
1993
o "Acoustic Feedback
Cancellation in Hearing Aids", (paper)
Rongtai Wang and Ramesh Harjani, in Proceedings of the IEEE International
Conference on Acoustics, Speech and Signal Processing, pp. 137-140, 1993
o "The Suppression of
Acoustic Oscillation in Hearing Aids Using Minimum Phase Techniques",
(paper)
Rongtai Wang and Ramesh Harjani, in Proceedings of the IEEE International
Symposium on Circuits and Systems, pp. 818-821, 1993
o "A Dual Frequency
Range Micromachined Silicon Accelerometer
Architecture Using Capacitive and Piezoelectric Sensing Techniques", (paper)
B. A. Blow, D. L. Polla, R. Harjani and T. Tamagawa, in Proceedings of the IEEE International
Symposium on Circuits and Systems, pp. 1120-1124, 1993
·
1987
- 1992
o "Designing
Mixed-Signal ICs", (paper)
Ramesh Harjani, IEEE Spectrum, pp. 49-51, Nov 1992,
o "OASYS: A Framework
for Analog Circuit Synthesis", (paper)
Ramesh Harjani, In Proceedings of The Second Annual IEEE ASIC Seminar and
Exhibit, pp. P13.1/1-4, Sept 1989,
o "OASYS: A Framework
for Analog Circuit Synthesis", (paper)
Ramesh Harjani, Rob A. Rutenbar and L. Richard Carley, IEEE Transactions on
Computer-Aided Design of Integrated Circuits and Systems, Vol., No 12, pp.
1247-1266, December 1989.
o "ACACIA: the CMU
Analog Design System", (paper)
L. R. Carley, D. Garrod, R. Harjani, J. Kelly, T.
Lim, E. Ochotta, R. A. Rutenbar, in Proceeding of the IEEE Custom Integrated
Circuits Conference, pp. 4.3/1-5, May 1989.
o "Analog Circuit
Synthesis for Performance in OASYS", (paper)
Ramesh Harjani, Rob A. Rutenbar and L. Richard Carley, in Proceedings of the
IEEE International Conference on Computer-Aided Design, pp. 492-495, Nov 1988.
(winner best paper award)
o "Analog Circuit
Synthesis & Exploration in OASYS", (paper)
Ramesh Harjani, Rob A. Rutenbar and L. Richard Carley, in Proceedings of the
IEEE International Conference on Computer Design, pp. 44-47, Oct. 1988.
o "A Prototype
Framework for Knowledge-Based Analog Circuit Synthesis", (paper)
Ramesh Harjani, Rob A. Rutenbar and L. Richard Carley, in Proceedings of the
IEEE/ACM Design Automation Conference, pp. 42-49, August 1987. (winner best paper award)