Parhi Lab Alumni and Students
Current Visitors, Graduate and Undergraduate Students
- Sai Sanjay Balaji (Ph.D.)
- Sin-Wei Chiu (Ph.D.)
- Wenrui Xu (Ph.D.)
- Aditya Sodhani (Ph.D.)
- Ryan A. Nelson (Ph.D.)
- Rakshithaa Kanakarajan Selvarathinam (MSECE)
- Evan Krainess (NSF REU)
- Ryan Ng (NSF REU)
- Anas Enanaa (NSF REU)
Ph.D. Theses Supervised
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Lori E. Lucke, "Applying Parallel Processing Techniques to Digital Signal Processing Algorithms and Architectures for High-Level VLSI Synthesis", December 1992 (Currently Fellow, Minnetronix, St. Paul)
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Ching-Yi Wang, "MARS: A High-Level Synthesis Tool for Digital Signal Processing Architecture Design", December 1992, (Currently with Boston Scientific, St. Paul)
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Naresh R. Shanbhag, "Design of Pipelined VLSI Adaptive Digital Filters with Relaxed Look-Ahead", July 1993 (Currently Jack Kilby Professor of ECE at Univ. of Illinois , Urbana)
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H.R. Srinivas, "High-Speed Computer Arithmetic Architectures", September 1994, (Currently with Broadcom, Irvine, CA)
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Raghunath Kalavai, "High-Speed RLS Adaptive Filters", October 1994, (Currently with Qualcomm, NJ)
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Jin-Gyun Chung, "Pipelining of IIR Lattice and Wave Digital Filters", November 1994, (Currently Professor at Chonbuk National University , Chonju, S. Korea)
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Tracy C. Denk, "Retiming, Folding and Register Minimization for DSP Synthesis", July 1996, (Currently CEO, First Fidelity Funding Group)
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Janardhan H. Satyanarayana, "Design of Low-Power DSP Systems", March 1998, (Currently with Intel , Allentown, PA)
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Ahmed F. Shalash, "Architecture and System Design for Digital Subscriber Loop Communications", June 1998, (Formerly Professor at Cairo University , Egypt)
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Leilei Song, "Low-Power VLSI Architectures for Finite-Field Applications", June 1999, (Currently at Apple, Cupertino, CA)
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Yun-Nan Chang, "Low-Power Bit-Serial and Digit-Serial DSP Systems", June 1999, (Currently Professor at National Sun Yat-Sen University, Kaohsiung, Taiwan)
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Jun Ma, "High-Performance CORDIC-based Orthogonal Recursive and Adaptive Filtering," July 1999, (Formerly Professor at Jiao Tong University, Shanghai, China)
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Martin Kuhlmann, "High-Performance Low-Power Arithmetic Architectures and Circuits", Dec. 1999
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Vijay Sundararajan, "Performance Optimization Methodologies for Design of Digital VLSI Systems", Jan. 2000 (Currently at Broadcom, San Jose)
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Zhongfeng Wang, "High-Performance, Low-Complexity VLSI Design in Turbo Decoders", Aug. 2000, (Currently Professor at Nanjing University, Nanjing, China)
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Robert A. Freking, "Structural Strategies for High-Performance Undelimited-Codeword Source Coding", Oct. 2000, (Currently with M.I.T. Lincoln Laboratories, MA)
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William L. Freking, "Algorithms and Architectures for High-Performance Public-Key Cryptosystems", October 2000
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Lijun Gao, "Architecture Design and Mapping of DSP Systems", Feb. 2001, (Currently with Analog Devices, Boston, MA]
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Zhipei Chi, "High-Performance, High-Speed VLSI Architectures for Wireless Communications Applications", June 2001, (Currently with NXP, Calif.)
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Tong Zhang, "Efficient VLSI Architectures for Error-Correcting Coding", June 2002, (Currently Professor, Dept. ECSE, RPI, Troy, NY)
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Yanni Chen, "Low-Complexity High-Speed VLSI Architectures for Error-Correction Decoders", May 2003, (Currently Apple, Cupertino, CA)
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Jun Jin Kong, "Classical and Quantum Convolutional Codes: Design and Implementation", Feb. 2005, (Currently "Master" at Samsung, South Korea)
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Xinmiao Zhang, "Architectures for Error Correcting Codes and Cryptosystems", June 2005, (Currently Professor at Ohio State University)
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Yongru Gu, "VLSI Architectures for High-Speed Transceivers", July 2005, (Currently at InPlay Technology, Irvine, CA)
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Jun Tang, "Architectures for OFDM Based Ultra Wideband Systems", August 2006, (Currently at InPlay Technology, Irvine, CA)
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Sang-Min Kim, "Efficient VLSI Architectures for Error Control Coders", October 2006, (Currently with Qualcomm, San Diego, CA)
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Jian-Hung Lin, "Algorithms and Architectures for Next Generation Multimedia Communications Systems", January 2007, (Currently with Marvell)
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Yuping Zhang, "VLSI Architectures for Turbo Code Decoders, LDPC Code Decoders and List Sphere Decoders", May 2007, (Currently with Marvell, CA)
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Chao Cheng, "High-Speed Low-Cost VLSI DSP Algorithms Based on Novel Fast Convolutions and Look-Ahead Pipelining Structures," May 2007, (Currently with TikTok, CA)
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Aaron E. Cohen, "Architectures for Cryptography Accelerators", September 2007, (Currently with Naval Research Lab, Washington, DC)
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Daesun Oh, "Low Complexity VLSI Architectures for LDPC Decoders", May 2008 (Currently with Samsung, South Korea)
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Jie Chen, "Efficient VLSI Architectures for High-Speed Ethernet Transceivers", Aug. 2008 (Currently Cofounder and VP at InnoGrit, Santa Clara, CA)
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Renfei Liu, "Error Control Algorithms and Architectures for Reliable DSP Systems," Nov. 2010 (Broadcom Corp., Irvine, CA)
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Yun Sang Park, "Reduced-Complexity Epileptic Seizure Prediction with EEG," Jan. 2012 (Coadvised by Prof. Theoden I. Netoff) (Currently with Samsung, S. Korea)
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Hua Jiang, "Digital Logic and Signal Processing Computations with Molecular Reactions," May 2012 (Coadvised by Prof. Marc D. Riedel) (Currently with Netflix, CA)
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Manohar Ayinala, "Low-Power Architectures for Signal Processing and Classification Systems," July 2012 (Currently with Intel, Austin, TX)
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Chuan Zhang, "Low-Latency Low-Complexity Channel Decoder Architectures for Modern Communication Systems," December 2012 (Currently Professor at Southeast University, Nanjing, China)
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Te-Lung Kung, "Synchronization and Coding in Wireless Communication Systems," September 2013
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Sohini Roychowdhury, "Automated Segmentation and Pathology Detection in Ophthalmic Images," July 2014 (Currently with Accenture, CA)
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Yingjie Lao, "Authentication and Obfuscation of Digital Signal Processing Integrated Circuits," July 2015 (Currently Assistant Professor at Clemson University, South Carolina)
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Bo Yuan, "Algorithm and VLSI Architecture for Polar Codes Decoder," July 2015 (Currently Assistant Professor at Rutgers University)
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Tingting Xu, "Biomarkers for Mental Disorders from Neuroimaging Data," December 2016 (Formerly Ad Colony, Seattle)
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Yin Liu, "Digital Signal Processing and Machine Learning System Design using Stochastic Logic," July 2017 (Snapchat, Seattle, WA)
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Sayed Ahmad Salehi, "A Framework for Computing Discrete-Time Systems and Functions using DNA, July 2017 (Coadvised by Prof. Marc D. Riedel) (Assistant Professor, University of Kentucky)
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Zisheng Zhang, "Approaches to Feature Identification and Feature Selection for Binary and Multi-Class Classification," July 2017 (iRhythm, San Francisco)
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Sandhya Koteshwara, "Secure, Resilient and Low-Energy Hardware Architectures for Internet-of-Things," September 2018 (IBM T.J. Watson Research Center, Yorktown Heights, New York)
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Shu-Hsien Chu, "Approaches to Anatomical and Functional Brain Connectivity Analysis with Applications to Adolescent Major Depressive Disorder," September 2018, (Coadvised by Prof. Christophe Lenglet) (Intel, Oregon)
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Bhaskar Sen "Static and Dynamic Connectivity Analysis of Human Brain via Functional Magnetic Resonance Imaging," July 2020 (Microsoft, Redmond, WA)
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Satya Venkata Sandeep Avvaru, "Causal Network Analysis in the Human Brain: Applications in Cognitive Control and Parkinson's Disease," April 2022 (Boston Scientific)
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Nanda Kumar Unnikrishnan "Towards Hardware-Software Co-design for Energy-Efficient Deep Learning," June 2023 (Meta, Menlo Park, CA)
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Xingyi Liu "Machine Learning Systems Design using Molecular and DNA Reactions," August 2023 (Mayo Clinc, Rochester, MN)
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Lulu Ge, "Hyperdimensional Computing based Classification and Clustering: Applications to Neuropsychiatric Disorders," December 2023
M.S. Projects/Theses Supervised
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Gregory S. Munson, "Finite Precision Effects in Scattered and Clustered Look-Ahead Pipelined Recursive Digital Filter Implementations," June 1989,
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Jim Malaney , "Design of a Programmable Digital Filter," November 1989
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Lai Q. Pham , "Roundoff Errors in Digital Filters using Redundant Numbers," November 1989
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Syed Babar Raza , "Reduction of Hardware Overhead in Recursive Filters by Interleaving," January 1991
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Joo-Sang Lee , "A New Approach for Design of Data Format Converter Architectures using Register Allocation," May 1991
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H.R. Srinivas, "High-Speed VLSI Arithmetic Processor Architectures using Hybrid Number Representation," July 1991
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N. Iyer , "iSchematic: An Automatic Schematic Generator for OCT 5.0 Database," September 1991
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Andrew P. Brown, "Applications of Circuit Retiming to DSP Architecture Design," October 1991
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Jin-Gyun Chung, "Synthesis of Pipelined Lattice IIR Digital Filter," November 1991
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Gireesh Shrimali, "Fast Arithmetic Coder Architectures," June 1993
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Wayne C. Amendola, Jr., "VLSI Implementation of a 200 MHz 16x16 Redundant Digit Multiplier and a 125 MHz Booth-Encoded Redundant Digit Multiplier," June 1993
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Bin Fu, "VLSI Design Advances in Arithmetic Coding," May 1995
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Santosh Mishra, "CDMA Based Mobile Communications Systems," May 1995
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Darren Pearson, "Low Power Strategies for VLSI Implementation of Digital Filters," May 1995
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Surendra Jain, "Efficient VLSI Architectures for Finite Field Arithmetic," June 1995
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Yun-Nan Chang, "High-Level DSP Synthesis using Heterogeneous Functional Units," June 1995
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Yuet Li, "STAR ADaptive Lattice Recursive Least Square Filters," Feb. 1996
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Chong Xu, "Power-Speed Reconfigurable FIR Filters," Feb. 1996
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David Parker, "Low-Area/Power Parallel FIR Filters," May 1996
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Mayukh Majumdar, "Low-Area Data Format Converters," June 1996
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Leilei Song, "Efficient Bit-Serial Finite Field Multipliers," June 1996
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John Bratt, "Low-Area Data Format Converters,"VHDL Interface for MARS DSP Synthesis System," June 1996
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Hojun Kim, "Coefficient Optimization in Pipelined IIR Digital Filters," July 1996
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Mousumi Gayen, "ILP Scheduling with Processor Interconnection," Jan. 1997
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Nikhil Sarpotdar, "Radix-2 Division and Square-Root Algorithms: Study and Implementation," July 1997
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William Ho , "Power Efficiency of the Carry-Select Adder," Aug. 1997
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Ashish Karandikar, "Low-Power and High-Performance Static Random Access Memory," Dec. 1997
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Zhipei Chi , "Pipelined Single-Channel and Multi-Channel Lattice RLS Adaptive Filters," Sept. 1998
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Nidish Kamath, "Scheduling DSP Algorithms for Low-Power Design," Jan. 1999
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Dhiraj Kumar, "Performance Tradeoffs of DCT Architectures in Xilinx FPGAs," April 1999
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Ziyu Li, "DLMS Adaptive Filter: Bit-Serial Systolic Array VLSI Implementation," July 1999
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Robin Bansal, "Optimized Power and Delay Solutions for Digital CMOS Circuits by Transistor Reordering using HEAT," August 1999
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Ru-Guang Chen, "Double error Correction on Residue Number System," Feb. 2000
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Bibhudatta Sahoo, "A Low-Power Correlator," Aug. 2000
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Siwei Chen, "Minimum Switching Activity Schedules for Various FIR Filters," Aug. 2000
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Wenhao Wu, "VLSI Design and Implementation of Two viterbi Decoders," Aug. 2000
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Karuna Prasad, "Power Analysis of 4-2 and 5-2 Compressors," Jan. 2001
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Aaron E. Cohen, "VLSI Architectures for RSA," June 2004
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Saurabh Jain, "Low-Complexity Pipelined-Parallel Decision feedback Decoder (PDFD) for 1 Gbps ethernet," Aug. 2004
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Lina Long, "A VLSI Implementation for Viterbi Decoder in Ultra-Wideband System," March 2005
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Manoj Yadav, "LDPC Decoder for DVB System," May 2005
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Renfei Liu , "VLSI Architectures for Viterbi Decoders," May 2007
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Daesun Oh , "LDPC Decoder Architectures," Feb. 2008
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Jie Chen , "Architectures for 10-gigabit Ethernet," Feb. 2008
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Priyadharshini Vijayakumar , "Timing Variations in Digital Filters with Supply Variations," August 2008
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Prashant Metkar , "Improved Approach for Calculating Model Parameters in Speaker Recognition using Gaussian Mixture Models," May 2009
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Jaime Rivera, "Research for the Development of an Apparatus to help Prevent Sudden Infant Death," May 2009
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Xiaoming Zhu, "Lung Sound separation by Independent Component Analysis," June 2009
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Yun-Sang Park, "Seizure Prediction by Support Vector Ma chine Classification," Jan. 2010
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Yingbo Hu, "Subthreshold Circuit Design," August 2010
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Manohar Ayinala, " High-Throughput VLSI Architectures for CRC/BCH Encoders and FFT Computations," Nov. 2010
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Lan Luo, "Postprocessing of Seizure Prediction by Kalman Filter," May 2011
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Te-Lung Kung, "Frame Start Synchronization in OFDM System," September 2011
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Michael Brown, "A Low-Complexity Seizure Prediction Algorithm," November 2011
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Chuan Zhang, "Polar Code Decoder Architectures," April 2012
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Tingting Xu, "Schizophrenia Classification from MEG," April 2012
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Manikandan Palani , "EEG Data Compression," May 2014
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Aravinth Chinnapalanichamy , "Serial and Interleaved FFT Architectures for Real Signals," Jan. 2015
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Sandhya Koteswara, "Obfuscated FFT Architecture," Feb. 2015
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Sayed Ahmad Salehi, "DNA Computing," April 2015
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Yingjie Lao, "Removing Redundancies of Fast Fourier Transform Computations," July 2015
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Goutham N.C. Shangumam, "An obfuscated radix-2 real FFT architecture," Sept. 2015
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Vaishnavi Santhapuram, "Timing Induced Error Analysis for Wallace Tree Multipliers," Oct. 2015
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Anoop Koyily, "A Study on Modeling of MUX-based Physical Unclonable Functions," April 2018
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S.V. Sandeep Avvaru, "Attack-Resistance and Reliability Analysis of Feed-Forwardand Feed-Forward XOR Arbiter PUFs," May 2019
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Zitao Yang, "Seizure Detection using Neural Networks," Dec. 2020
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Brandon Ung, "ECG Classification using Hyperdimensional Computing," May 2023
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Joe Gould, "Image Filtering using Row Processing," May 2024
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Carl Anderson, "Physical Unclonable Function using DNA," June 2024
Former Visitors
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Dr. Kazuhito Ito (1992-1993)
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Dr. Ching-Yi Wang (1993-1996)
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Dr. Luis Montalvo (1995-1996)
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Prof. Michalis Zervakis (1996)
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Dr. Steve Summerfield (1997)
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Mr. Hiroshi Suzuki (1997-1999)
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Dr. Javier Valls (1999)
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Dr. Trini Sansaloni (1999)
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Dr. Yuke Wang (1999)
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Dr. Jin-Gyun Chung (2001)
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Dr. Chester (Sungchung) Park (2005)
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Ms. Chunlei Xia (2006)
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Dr. Mario Garrido (2007)
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Dr. Hemant Patil (2009)
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Dr. Xiaoping Li (2010)
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Sayed Ahmad Salehi, (Predoctoral Visitor from Isfahan Univ., Iran) (2011-12)
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Mojtaba Bandarabadi (Predoctoral Visitor from Coimbra University, Portugal) (Coadvised by Prof. Tay Netoff) (2012)
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Prof. Yun-Nan Chang (Visiting Professor from National Sun Yat-Sen Univ., Taiwan) (2012)
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Abdolreza Rashno (Pre-Doctoral Visitor from Isfahan University of Technology, Iran) (2016)
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Sai Sanjeet Yerraguntala (Predoctoral Visitor, IIT Kharagpur, India, 2023)
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Dr. Weihang Tan, Postdoctoral Research Associate, 2023
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Dr. Arijit Mondal, Postdoctoral Research Associate, 2022-2024
Recent Undergraduate Research Students (REU, Senior Honors Theses, UROP)
2023-24
- Abhay Upadhyaya (NSF REU)
- Megan E. Adamek (NSF REU)
- Evan Krainess (NSF REU)
- Ryan Ng (NSF REU)
2022-23
- Carl Anderson (NSF REU)
- Wenrui Xu (Senior Honors Project)
2021-22
- Joe Gould (Senior Honors Thesis)
- Hans Bakken (Senior Honors Thesis)
- Brandon Ung (NSF REU)
- Carl Anderson (UROP, NSF REU)
2020-21
- Ryan Billmeyer (Senior Honors Thesis)
- Ryan Chen (Senior Honors Thesis)
- Andrew LaFortune (Senior Honors Thesis)
- Eric Minnerath (NSF REU)
- Brandon Ung (NSF REU)
- Nicole Essner (NSF REU, Summer Research)
2018
- Alex Ayling (Summer Research)
Recent Senior Design Students
Spring 2024
Project: RTRFFT: Real-Time Real FFT Spectrum Analyzer
Graduate Student Mentor: Sin-Wei Chiu
- Njoud Alalawi
- Andrew Danciak
- Ben Deyle
- Andrew Forness
- Nathan Redfern
Fall 2023
Project: VFVT Project: Binary Classification of life-threatening Ventricular Fibrillation and Ventricular Tachycardia from IEGM recordings on the given MCU platform
Graduate Student Mentor: Wenrui Xu
- Ginny Bissen
- Sebastian Cordero
- Kevin Sann
- Christian Steiner
- Jim Swenson
Spring 2023
Project: Wearable Neuromodulation
Industry Advisor: Mr. David Francischelli, BioScience Innovations, LLC
- Amanda Hawley
- Leyan Sayeh
- Anwaar Hadi
- Omar Sleiman
- Joe Jasper
Spring 2022
Project: Seizure Detection using Discrete Wavelet Coefficients
- Frederick Alonzi
- Babacar Diouf
- Sam Froehle
- Roshina Mohamed Rafee
- Cole Stansbury
- Jenny Tran
Fall 2020
Project: Seizure Detection using Convolutional Neural Networks
Graduate Student Mentor: Nanda Unnikrishnan
- Tara Pereira
- Cole Rabe
- Wesley Samples
- Trent Tufte
- Roshan Wariar
Spring 2018
Project: Physical Unclonable Functions
Graduate Student Mentor: Sandeep Avvaru
- Alex Ayling
- Peyton Bechhold
- William Fox
- Moudu Jaw
- Sung Won Kang
- Michael Ziebarth
Spring 2016
Project: Segmentation of Electrocardiogram
Coadvisor: Cathie Condie, Medtronic
- Alex Motley
- Blake Trantina
- Emily Mattison
- Jahanara Ahsan
- Tikuabo Atsbaha
Spring 2015
Project: Web App Design for Vessel Segmentation of Fundus Images
- Peter Brudzinski
- Shilin Chen
- Tom Hinrichs
- VĂtor Matos
- Yingnan Wang
Fall 2013
Project: Web App Design for Vessel Segmentation of Fundus Images
- Nathan Bruner
- Smitesh Kharat
- Tyler Krause-Lewis
- Niraj Rayalla
- Hassan Saleh
- Lucas Sherman
Spring 2012
Project: Simultaneous Audio Recording Interface
Coadvisor: Michael Brown
- Debbie Baran
- Calvin Behling
- Dale Frolik
- Micah Hakala
- Nick Mensen
- Ben Wilde
Fall 2009
Project: Breaker Controller and Waveform Generator Test-Set FPGA Project
Coadvisor: Joe Ruether, Xcel Energy
- Nate Bolyard
- Hugo Guadalupe Chavolla
- Justin Thomas Fuith
- Brandon Joshua Rice
- Elsayed G Shamekh
Fall 2003
- Arash Allaei
- Spencer Dille
- Erik Freed
- Minassie Tewoldebrhan
- Matthew Russell
Group Photos
2003
2004
2005
2006
2007
2012
2013
2017
April
ISCAS (May)
China (June)
- Shanghai
- PCII Workshop
- Fudan 1
- Fudan 2
- Jiao Tong UMICH JI
- Shanghai Tech
- Southeastern University
- Nanjing 1
- Nanjing 2