Ph.D.
Theses Supervised by Keshab K. Parhi:
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Lori E. Lucke, "Applying Parallel Processing Techniques to
Digital Signal Processing Algorithms and Architectures for
High-Level VLSI Synthesis", December 1992
(Currently Fellow, Minnetronix, St. Paul)
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Ching-Yi Wang, "MARS: A High-Level Synthesis Tool for
Digital Signal Processing Architecture Design", December 1992,
(Currently with Boston Scientific, St. Paul)
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Naresh R. Shanbhag, "Design of Pipelined VLSI Adaptive
Digital Filters with Relaxed Look-Ahead", July 1993
(Currently Jack Kilby Professor of ECE at Univ. of Illinois , Urbana)
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H.R. Srinivas, "Floating Point Computer Arithmetic Architectures",
September 1994, (Currently with Broadcom, Irvine, CA)
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Raghu Kalavai, "Pipelined STAR RLS Adaptive Filters", October 1994,
(Currently with Ikanos, NJ)
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Jin-Gyun Chung, "Pipelined IIR
Lattice and Wave Digital Filters", November 1994,
(Currently Dean of Engineering at Chonbuk National University , Chonju, S. Korea)
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Tracy C. Denk,
"Retiming, Folding and Register Minimization",
July 1996,
(Currently with Newport Media Inc. , Irvine, CA)
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Janardhan H. Satyanarayana, "Design of
Low-Power DSP Systems", March 1998,
(Currently with Intel , Austin, TX)
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Ahmed Shalash, "Architecture and System Design for Digital
Subscriber Loop Communications", June 1998,
(Currently Professor at Cairo University , Egypt)
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Leilei Song, " Low-Power VLSI Architectures for
Finite-Field Applications", June 1999,
(Currently at Intel, Santa Clara, CA)
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Yun-Nan Chang, "Low-Power Bit-Serial and Digit-Serial DSP Systems",
June 1999, (Currently Professor at National Sun Yat-Sen University, Kaohsiung,
Taiwan)
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Jun Ma, "Pipelined RLS Adaptive Filters", July 1999,
(Currently Professor at Jiao Tong University, Shanghai, China)
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Martin Kuhlmann, "High-Performance Low-Power
Arithmetic Architectures and Circuits", Dec. 1999
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Vijay Sundararajan, "Performance Optimization Methodologies
for Design of Digital VLSI Systems", Jan. 2000
(Currently Assoc. Technical Director at Broadcom, San Jose)
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Zhongfeng Wang, "High-Performance and Low-Cost
VLSI Design of Turbo Decoders", Aug. 2000,
(Currently Professor at Nanjing University, Nanjing, China)
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Robert A. Freking, "Structural Strategies for
High-Performance Undelimited-Codeword Source Coding", Oct. 2000,
(Currently with M.I.T. Lincoln Laboratories, MA)
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William L. Freking, "Algorithms and
Architectures for High-Performance Public-Key
Cryptosystems", October 2000
(Currently with M.I.T. Lincoln Laboratories, MA)
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Lijun Gao, "Architecture Design and Mapping of DSP
Systems", Feb. 2001,
(Currently with Analog Devices, Boston, MA]
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Zhipei Chi, "High-Performance, High-Speed
VLSI Architectures for Wireless Communications Applications", June 2001,
(Currently with Marvell Technology Group, Calif.)
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Tong Zhang, "Efficient
VLSI Architectures for Error-Correction Coding", June 2002,
(Currently Professor, Dept. ECSE, RPI, Troy, NY)
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Yanni Chen, " Low-Complexity
High-Speed VLSI Architectures for Error-Correction Decoders", May 2003,
(Currently Apple, Cupertino, CA)
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Jun Jin Kong, "Classical and Quantum
Convolutional Codes: Design and Implementation", Feb. 2005,
(Currently "Master" at Samsung, South Korea)
-
Xinmiao Zhang, "Architectures for Error
Control Coders and Cryptography Systems", June 2005,
(Currently Associate Professor at Ohio State University)
-
Yongru Gu, "VLSI Architectures for High-Speed
Transceivers", July 2005,
(Currently at InPlay Technology, Irvine, CA)
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Jun Tang, "Architectures for OFDM Based
Ultra Wideband Systems", August 2006,
(Currently at InPlay Technology, Irvine, CA)
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Sang-Min Kim, "Efficient VLSI Architectures for
Error Control Coders", October 2006,
(Currently with Qualcomm, San Diego, CA)
-
Jian-Hung Lin, "Algorithms and Architectures
for Next Generation Multimedia Communications Systems",
January 2007,
(Currently with MaxLinear , Irvine, CA)
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Yuping Zhang,
"VLSI Architectures for Turbo Code Decoder, LDPC Code
Decoder and List Sphere Decoder",
May 2007,
(Currently with Apple, CA)
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Chao Cheng,
"High-Speed Low-Cost VLSI DSP Algorithms Based on Novel Fast
Convolutions and Look-Ahead Pipelining Structures"
May 2007,
(Currently with Qualcomm, Santa Clara, CA)
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Aaron E. Cohen,
"Architectures for Cryptography Accelerators",
September 2007,
(Currently with Naval Research Lab, Washington, DC)
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Daesun Oh,
"Low Complexity VLSI Architectures for LDPC Decoders", May 2008
(Currently with Samsung, South Korea)
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Jie Chen,
"Efficient VLSI Architectures for High-Speed Ethernet
Transceivers", Aug. 2008
(Currently Manager at Marvell Technology Group, Santa Clara, CA)
-
Renfei Liu,
"Error Control Algorithms and Architectures for Reliable
DSP Systems," Nov. 2010
(Currently with Broadcom Corp., Irvine, CA)
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Yun Sang Park,
"Reduced-Complexity Epileptic Seizure Prediction with EEG,"
Jan. 2012
(Coadvised by Prof. Theoden I. Netoff)
(Currently with Samsung, S. Korea)
-
Hua Jiang,
"Digital Logic and Signal Processing Computations with
Molecular Reactions,"
May 2012
(Coadvised by Prof. Marc D. Riedel)
(Currently with Netflix, CA)
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Manohar Ayinala,
"Low-Power Architectures for Signal Processing and
Classification Systems,"
July 2012
(Currently with Intel, Allentown, PA)
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Chuan Zhang,
"Low-Latency Low-Complexity Channel Decoder Architectures for
Modern Communication Systems,"
December 2012
(Currently Associate Professor at Southeast University, China)
-
Te-Lung Kung,
"Synchronization and Coding in Wireless Communication
Systems,"
September 2013
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Sohini Roychowdhury,
"Automated Segmentation and Pathology Detection in Ophthalmic Images,"
July 2014
(Currently with Volvo, Mountain View, CA)
-
Yingjie Lao,
"Authentication and Obfuscation of Digital Signal Processing Integrated Circuits,"
July 2015
(Currently Assistant Professor at Clemson University, South Carolina)
-
Bo Yuan,
"Algorithm and VLSI Architecture for Polar Codes Decoder,"
July 2015
(Currently Assistant Professor at City University of New York)
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Tingting Xu,
"Biomarkers for Mental Disorders from Neuroimaging Data,"
December 2016
(Ad Colony, Seattle)
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Yin Liu,
"Digital Signal Processing and Machine Learning System Design using Stochastic Logic,"
July 2017
(Microsoft, Redmond, WA)
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Sayed Ahmad Salehi,
"A Framework for Computing Discrete-Time Systems and Functions using DNA,"
July 2017,
(Coadvised by Prof. Marc D. Riedel)
(Utah Valley University)
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Zisheng Zhang,
"Approaches to Feature Identification and Feature Selection for Binary and
Multi-Class Classification,"
July 2017
(irhythm, San Francisco)
[Prof.
Parhi's homepage]