Intro
A. DeHon and J. Wawrzynek, “Embedded
Tutorial: Reconfigurable Computing: What, Why, and
Implications for Design Automation”, Design
Automation Conference (DAC), pp. 610 – 615,
1999.
S. Hauck, "The
Roles of FPGAs in Reprogrammable Systems", Proceedings
of the IEEE, Vol. 86, No. 4, pp. 615 – 638,
April, 1998.
[IBM+Xilinx hybrid chip ICCAD'02]
Paul S. Zuchowski, Christopher B. Reynolds, Richard J.
Grupp, Shelly G. Davis, Brendan Cremen, Bill Troxel,
"A Hybrid ASIC and FPGA Architecture", International
Conference on Computer-Aided Design (ICCAD), pp. 187
- 194, 2002.
[Compton+Hauck Reconfig Comp Survey]
K. Compton and S. Hauck, "Reconfigurable Computing:
A Survey of Systems and Software", ACM Computing
Surveys, No. 2, June 2002, pp. 171-210.
ICCAD'02 tutorial: applications,
compilation, dynamic reconfig,
CAD.
Architectures
(a list of architectures is provided here)
- Splash:
- [ICCD93_p482-485_splash2Arch.pdf]
- [FCCM93_p172_177_SplashTextSearching.pdf]
- Garp: [FCCM97_p12_21_Garp.pdf],
(opt) [IEEE Compute00_v33_n4_p62_69.pdf].
- Napa: [FPGA98_p28_37_Napa.pdf]
- PipeRench: [ISCompArch99_p28_39_PipeRenchArch.pdf],
(opt) [Computer00_v33_n4_p70_77_PipeRench.pdf].
- RAW: [Computer97_v30_n9_p86_93_RAW.pdf]
- Matrix(opt):
E. Mirksy and A. DeHon, "MATRIX: A Reconfigurable
Computing Architecture with Configurable Instruction
Distribution and Deployable Resources", FCCM'96.
- DPGA(opt): [FPD95_DPGA_tau95.pdf]
Edward Tau, Derrick Chen, Ian Eslick, Jeremy Brown and
Andre DeHon, "A First Generation DPGA
Implementation", FPD’95 -- Third Canadian
Workshop of Field-Programmable Devices May 29-June 1,
1995, Montreal, Canada.
- RaPiD(opt): link
to U of Washington
Compilation
- StreamC: FPGA00_p49_56_StreamC.pdf
- Virtual wires: fccm99_virtWires_babb.pdf
- RaPiD: fccm98_RaPiD_compilation.pdf
- Garp: IEEE Computer.
- General-purpose: FPGA97_p165_173_HLCompilationFPGA.pdf,
fccm00_p101_110_c2HDLComp.pdf
- RFU+Superscalar: [fpl02-girish.pdf]
Girish Venkataramani, Suraj Sudhir, Mihai Budiu and Seth
Copen Goldstein, "Factors Influencing the
Performance of a CPU-RFU Hybrid Architecture",
FPL'02.
Applications
- CORDIC algorithms: FPGA98_p191_200_andraka.pdf
- Network processors: DAC02_p343_347.pdf
- Sensor networks: FCCM00_p59-67_uSensors.pdf
- Target recognition: FCCM97_p192_ATR.ps
- Floating point: FPGA02_p50_55-loiseau.pdf (opt)
- Fault detection/correction:
C. Bolchini, F. Salice and D. Sciuto, "Designing
Self-Checking FPGAs through Error Detection Codes",
International Symposium on Defect and Fault Tolerance in
VLSI Systems, Nov 2002.
- Floating-Point: [FPL02_paper.pdf]
E. Roesler and B. Nelson, "Novel Optimizations for
Hardware Floating-Point Units in a Modern FPGA
Architecture", FPL02.
- Data reorganization: fccm03_DinizPark_dataSearchReorg.pdf
Runtime Support Systems
- Config prefetching: FPGA02_p187-li.pdf
- Config caching: FCCM00_p22_36_hauckConfigCache.pdf
- Data organization: fpga02_p237-diniz.pdf
CAD
- Technology mapping:
- FlowMap: TCAD94_p1_12_v13_n1_jan_JCong.pdf
- T-VPack: fpga99_p37-marquardt.pdf
- Congestion-driven:
fpga02_p59-marekSedowska_techMapRents.pdf
- Heterogeneous FPGA mapping:
fpga00_p75-HetFPGA_TechMp_cong.pdf
- Placement
- VPR:
V. Betz and J. Rose, "VPR: A New Packing,
Placement and Routing Tool for FPGA Research",
FPL’97, pp. 213-222
- Timing-driven placement:
TVPlace [FPGA00_p203_213_TVPlace-marquardt.pdf],
hierarchical FPGA placement
[FPGA98_p85_92-senouci_hierPlacemt.pdf],
hierarchical placement using a lookahead scheme
[FPGA01_p3_11_hierFPGAPlc-hutton.pdf]
- Datapath placement:
T. J. Callahan, P. Chong, A. DeHon and J.
Wawrzynek, "Fast Module Mapping and
Placement for datapaths in FPGAs", FPGA, pp.
123 - 132, 1998.
- Speed/quality tradeoff:
FPGA99_p47_56_FPGA_FP_tabooSrch-emmert.pdf,
FPGA99_p157_166-sankar.pdf,
FPGA01_p29_36_runtimeQualityTradeoff-mulpuri.pdf
- Routing:
- Global routing:
TODAES00_p433_450_v5n3_jul_dfWong.pdf
- SAT-based detailed routing:
TCAD02_p674_684_v21n6_jun_SATroutingFPGA_rutenbar.pdf
Misc